CENG 441

Design of Digital and VLSI Systems

Units: 1.5, Hours: 3-1.5

Advanced combinational and sequential logic design. Optimization of finite state machines; timing methodologies and synchronization issues. Hardware description languages (HDL): structural and behavioural descriptions, simulation and testbenches, coding styles, design with HDL and FPGA implementation. Design for test: testing concepts, scan-based design and built-in self-test (BIST). Design for high speed: timing analysis, pipelining and retiming. Design for low power: sources of power dissipation, design transformations.

Note: Credit will be granted for only one of 441, 440, or 441, 465.

Prerequisites: 241 or 290.

Undergraduate course in Computer Engineering offered by the Department of Electrical and Computer Engineering in the Faculty of Engineering.