ECE 543

Design of Digital and VLSI Systems

Units: 1.5

Formerly: ELEC 543

Advanced combinational and sequential logic design. Optimization of finite state machines; timing methodologies and synchronization issues. Hardware description languages (HDL): structural and behavioural descriptions, simulations and testbenches, coding styles, design with HDL and FPGA implementation. Design for test: testing concepts, scan-based design and built-in self-test (BIST). Design for high speed: timing analysis, pipelining and retiming. Design for low power: sources of power dissipation, design transformations. Students will be required to complete a project.

Note:

Graduate course in the Electrical and Computer Engineering program offered by the Faculty of Graduate Studies.

Schedules:
Summer 2018 Fall 2018 Spring 2019

Summer timetable available: February 15. Fall and Spring timetables available: May 15.

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